The present invention relates to a data processing device having nonvolatile memory which can electrically rewrite stored information. For instance, the present invention relates to a technique effective to be applied to EEPROM (electrically erasable and programmable read only memory) employing an on-chip MONOS (metal oxide nitride oxide semiconductor) type memory cell of 1 transistor/1 bit of a microcomputer for an IC card.
A nonvolatile memory transistor which can electrically rewrite stored information has a channel forming region between a source electrode and a drain electrode and a charge storage region (trap region) storing electric charges such as electrons or holes via a gate oxide film over the channel forming region so as to form a memory gate electrode thereover via an insulator film. It is possible to reversibly employ an enhancement state holding electrons in the charge storage region to increase the threshold voltage (for example, a write state or a hold state of data “0”) and a depression state moving electrons from the charge storage region in the discharge direction to decrease the threshold voltage (for example, an erase state or a hold state of data “1”). In read operation, a negative voltage larger in an absolute value than the threshold voltage in the erase state is applied to the memory gate electrode. No read current can be flowed to an unselected memory cell at read. A voltage between the threshold voltage in the erase state and the threshold voltage in the write state may be applied to the memory gate electrode of a selected memory cell at read. It is unnecessary for a memory cell to employ the structure of 2 transistors/1 bit in which a select transistor for distinguishing select from unselect is connected to a memory transistor in series. Such nonvolatile memory is described in Patent document 1.
[Patent document 1] Japanese Unexamined Patent Publication No. Sho 60(1985)-095794